DATA_ALIGN Pragma – Tiva

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What is the purpose of a pragma Data_Align in TI emb. compiler.

The datasheet explanation:

http://www.ti.com/lit/ug/spnu151j/spnu151j.pdf

"The DATA_ALIGN pragma aligns the symbol in C, or the next symbol declared in C++, to an alignment
boundary. The alignment boundary is the maximum of the symbol's default alignment value or the value of
the constant in bytes. The constant must be a power of 2. The maximum alignment is 32768.
The DATA_ALIGN pragma cannot be used to reduce an object's natural alignment."

Can someone re-explain it in a different method? I really don't understand the purpose of this pre-compile directive.

Best Answer

DATA_ALIGN will cause the symbol to be located at an address that satisfies the specified alignment requirement. For example:

The following code will locate mybyte at an even address.

#pragma DATA_ALIGN(mybyte, 2)
char mybyte;

The following code will locate mybuffer at an address that is evenly divisible by 1024.

#pragma DATA_ALIGN(mybuffer, 1024)
char mybuffer[256];

Most symbols don't require any special alignment beyond the data type's default alignment so you won't need to use DATA_ALIGN often. But occasionally you'll want a symbol to be located on a special address boundary and that's when DATA_ALIGN is useful. For example, sometimes buffers used with a DMA controller should be aligned on a special boundary.

Related Solutions

Electronic – Usage of the #pragma pack(1) compiler directive on embedded applications

#pragma pack(1) ensures that C struct items are packed in order and on byte boundaries. It may save RAM - which is often precious in a microcontroller.

Packed structs also allow for casting directly over memory buffers for data interchange:

void f(void *buf)
{
  struct ip_header *hdr = (struct ip_header *)buf;
  hdr->dst = 0x8000001;
}

Be careful where you use #pragma pack. It's globally scoped (as it's in the preprocessor), so forgetting to turn it off will affect any #include files. If you only mean to pack certain structs, consider using GCC's __attribute__ ((packed)).

However, due to alignment issues, packed structs can impact performance. For example:

When packed into bytes:

struct
{
  uint8_t  a;
  uint32_t b;
  uint8_t  c;
  uint8_t  d:
};

Will be stored as (not accounting for endianness):

a, b0, b1, b2, b3, c, d

However, many architectures require 32bit accesses to be aligned to 32bit addresses. With the packed struct, the machine will have to make several byte accesses then stich them together again.

Faced with the above struct without packing enabled, the compiler could reorganise it as:

b0, b1, b2, b3, a, c, d

Does TI Tiva C ADC 5V tolerant

You need to look at the table called "Absolute Maximum Ratings" if you want to know if the chip will tolerate 5 volts (as opposed to function properly) on the analog inputs. It looks like some pins (at least when used as GPIOs) can tolerate up to 5.5 volts while others are limited to 0.3 volts above Vdd.

Best Answer

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Electronic – Usage of the #pragma pack(1) compiler directive on embedded applications

Does TI Tiva C ADC 5V tolerant

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